Microelectronic devices are fabricated on semiconductor wafers using a variety of techniques, e.g. including deposition techniques (CVD, PECVD, PVD, etc) and removal techniques (e.g. chemical etching, CMP, etc). Semiconductor e.g. silicon wafers may be further treated in ways that alter their mass e.g. by cleaning, ion implantation, lithography and the like.
Depending on the device being manufactured, each wafer may be passed sequentially through hundreds of different processing steps to build up and/or to remove the layers and materials necessary for its ultimate operation. In effect, each wafer is passed down a production line. The nature of semiconductor manufacturing means that certain processing steps or sequences of steps in the production flow may be repeated in a similar or identical fashion. For example, this may be to build up similar layers of metal conductors to interconnect different parts of the active circuitry.
To ensure consistency and interoperability of semiconductor equipment used in different factories, standards are adopted throughout the majority of the semiconductor manufacturing industry. For example, standards developed by Semiconductor Equipment and Materials International (SEMI) have a high degree of market uptake. One example of standardisation is the size and shape of the semiconductor (silicon) wafers: typically for volume production they are discs having a diameter of 300 mm.
During processing, wafers are typically transported around the production line (i.e. between different processes) within closed boxes, e.g. Standard Machine Interfaces (SMIFs) or Front Opening Unified Pods (FOUPs). These boxes provide physical and environmental protection for the wafers (especially from particles in the atmosphere which can pollute the surface to be treated) and to facilitate automated material handling. Each FOUP may have a standard configuration, e.g. holding a maximum of either 13 or (more commonly) 25 wafers.
The cost and complexity of the processing steps required to produce a completed silicon wafer together with the time that it takes to reach the end of the production line where its operation can be properly assessed has led to a desire to monitor the operation of the equipment on the production line and the quality of the wafers being processed throughout processing so that confidence in the performance and yield of the final wafers may be assured.
Wafer treatment techniques typically cause a change in mass at or on the surface of the semiconductor wafer. The configuration of the changes to the surface are often vital to the functioning of the device, so it is desirable for quality control purposes to assess wafers during production in order to determine whether they have the correct configuration.
Specialist metrology tools may be used within the production flow so that monitoring is conducted soon after the relevant process of interest and usually before any subsequent processing, i.e. between processing steps.
However, implementing wafer metrology often adds significant costs to the operation of the production line (e.g. simply by adding further manufacturing steps) while not increasing the volume or necessarily the quality of the devices being manufactured. For example, there are equipment running costs associated with the capital purchase and depreciation of the measurement equipment, the cost of the space required for the equipment in the treatment area (“clean-room”), and the cost of facilities and services consumed by the equipment.
Moreover, monitoring the quality of wafers can impose operational costs associated with the reduced efficiency of the production line. If specially manufactured test wafers are used then the factory automated handling system typically has to route a special FOUP (containing the test wafers) to the correct equipment for processing and then to the measurement equipment for testing. Unproductive time is incurred on the processing equipment while the test wafers are processed because production wafers cannot be processed during this time. Alternatively, if measurements are made on product wafers, then for each process step that must be monitored the number of movements that a FOUP must make during its journey down the production line is doubled (since the FOUP may move to and from metrology apparatus between each processing step that is to be monitored). This increases the cycle time of the factory, the amount of storage needed for wafers in production (WIP storage) and queuing required before each piece of equipment and also places additional demands on the capacity of the automated FOUP handling system.
Because of the costs of implementing product wafer metrology, device manufacturers often implement sampling schemes where only a selection of wafers are measured, e.g. each wafer in only a certain number of FOUPs or only certain wafers within each FOUP or a selection of FOUPs. Both of these schemes introduce additional risks where errors may go undiscovered. There is the possibility of an equipment error occurring during the processing of wafers in a particular FOUP that is not selected for measurement. It is also possible for a FOUP to be processed with the wrong recipe so that, for example, the wrong layer is deposited or even that the FOUP is mis-scheduled so that an entire processing step is omitted. Even if the FOUP is selected for measurement then unless all the wafers in the FOUP are checked the potential for errors to occur on individual wafers still exists.
Measuring the change in mass of a wafer either side of a processing step is an attractive method for implementing product wafer metrology. It is relatively low cost, high speed and can accommodate different wafer circuitry patterns automatically. In addition it can often provide results of higher accuracy than alternative techniques. For example, on many typical materials, thicknesses of material layers can be resolved down to an atomic scale. The wafer in question is weighed before and after the processing step of interest. The change in mass is correlated to the performance of the production equipment and/or the desired properties of the wafer.
While the equipment running costs of mass metrology equipment might be lower than alternative methods, this technique can still suffer from the effects of reduced production line efficiency. Indeed, because of the requirement for pre and post processing measurements the efficiency of the production line may be negatively affected more than alternative measurement methods. FOUP and/or wafer sampling schemes are therefore often implemented where mass metrology is used. This can introduce the risks identified above.